1.5V-12V Low Voltage Difference Linear DC to DC converters (LDO)

Sales 1.5V-12V Low Voltage Difference Linear DC to DC converters (LDO)

  • Output Voltage (V) : 1.5V-12V
  • Input DC Voltage (V) : (Vout+1)V

Product Detail  

1 Absolute maximum rated
Pulse input voltageVINP
(Positive pulse width 100ms,positive duty cycle 1%)…-20V~+60V;
Input voltageVIN ……………………………………………………  26V;
Output current limit ………………………………………………1.5A;
Storage temperature Tstg…………………………………… -65℃~150℃;
Lead welding temperature (10s)Th………………………………300℃;
Junction temperatureTj …………………………………………175℃;
Thermal resistanceR(th)J-C ……………………………………… 3.5℃/W;
Power consumption PD(Without heat sink)……………………  1W.

2 Recommended operating conditions
Input voltage VIN………………………………………………… (VOUT+1)V;
Operating temperature TC …………………………………-55℃~125℃;

3 Package Specifications
TS Package outline drawing
Fig 7a  TS Package outline drawing

Unit:mm

Symbols

Data

Minimum

Typical

Maxim

A

-

-

6.70

A1

0.70

-

1.30

A2

3.20

-

3.80

D

-

-

14.22

E

-

-

18.03

X

-

-

21.30

X1

17.33

-

18.33

L

12.0

-

-

e

-

2.54

-

φb

0.63

-

0.89

φP

3.70

-

4.30



TD Package outline drawing
Fig 7b  TD Package outline drawing
Unit:mm

Symbols

Data

Minimum

Typical

Maxim

A

-

-

6.70

A1

0.70

-

1.30

A2

3.20

-

3.80

D

-

-

14.22

E

-

-

18.03

X

-

-

21.30

X1

17.33

-

18.33

L

9.0

-

-

L1

4.58

-

5.58

e

-

2.54

-

φb

0.63

-

0.89

φP

3.70

-

4.30


 TU Package outline drawing
Fig 7c  TU Package outline drawing
Unit:mm

Symbols

Data

Minimum

Typical

Maxim

A

-

-

6.70

A1

0.70

-

1.30

A2

3.20

-

3.80

D

-

-

14.22

E

-

-

18.03

X

-

-

21.30

X1

17.33

-

18.33

L

9.0

-

-

L1

4.58

-

5.58

e

-

2.54

-

φb

0.63

-

0.89

φP

3.70

-

4.30


ZS Package outline drawing
Fig 7d  ZS Package outline drawing
Unit:mm

Symbols

Data

Minimum

Typical

Maxim

A

-

-

6.70

A1

3.20

-

3.80

A2

0.70

-

1.30

B

2.87

-

3.48

B1

6.05

-

6.65

D

-

-

14.22

E

-

-

18.03

Y

-

-

30.72

L

12.0

-

-

e

-

2.54

-

φb

0.63

-

0.89

φP

2.90

-

3.50


ZD Package outline drawing
Fig 7e  ZD Package outline drawing
Unit:mm

Symbols

Data

Minimum

Typical

Maxim

A

-

-

6.70

A1

3.20

-

3.80

A2

0.70

-

1.30

B

2.87

-

3.48

B1

6.05

-

6.65

D

-

-

14.22

E

-

-

18.03

Y

-

-

30.72

L

9.0

-

-

L1

4.58

-

5.58

e

-

2.54

-

φb

0.63

-

0.89

φP

2.90

-

3.50


ZU Package outline drawing
Fig 7f  ZU Package outline drawing
Unit:mm

Symbols

Data

Minimum

Typical

Maxim

A

-

-

6.70

A1

3.20

-

3.80

A2

0.70

-

1.30

B

2.87

-

3.48

B1

6.05

-

6.65

D

-

-

14.22

E

-

-

18.03

Y

-

-

30.72

L

9.0

-

-

L1

4.58

-

5.58

e

-

2.54

-

φb

0.63

-

0.89

φP

2.90

-

3.50


4 Pin Designations
The leading end arrangement shall be as specified in Fig 8. Fig 8a shows the product leading ends in the form of TS, TD, TU package type. Fig 8b shows the product leading ends in the form of ZS, ZD, ZU package type.
Pin Designations (Apply for TS, TD, TU package type)
Fig 8a Pin Designations (Apply for TS, TD, TU package type)

Pin

Symbol

Designation

1

En

Enable

2

VIN

Input

3

GND

GND

4

VOUT

Output

5

NC

NC




Pin Designations (Apply for ZS, ZD, ZU package type)
Fig 8b Pin Designations (Apply for ZS, ZD, ZU package type)

Pin

Symbol

Designation

1

En

Enable

2

VIN

Input

3

GND

GND

4

VOUT

Output

5

ADJ

Adjustment voltage


5  Ordering Information
Part number contains the use of the production process, serial number, output voltage, quality level and other information. As shown below:

Ordering Information

6  Technical Specifications
Table 3a  HSK5115-00 Electrical characteristics

Items

Symbol

Condition (Unless otherwise specified, -55℃≤TA≤125℃)

A Group

Limited value


Unit

Min

Max

Input and output voltage difference

VDO

TA=25℃;△VOUT=-1%;IOUT=100mA

1

600

mV

TA=25℃;△VOUT=-1%;IOUT=1.5A

700

Static(ground)current

IQ

TA=25℃;VIN=4.3V,IOUT=0.75A

1

40

mA

TA=25℃;VIN=4.3V,IOUT=1.5A

60

Load regulation

SI

IOUT=10mA→1.25A,VIN=4.3V

1,2,3

2

%

Voltage regulation

SV

VIN=4.3V→26V,IOUT =10mA

1,2,3

1

%

Output noise voltage

VN

TA=25℃;CL=33μF;f≤300KHz

4

700

μV

Output current limit

ILIM

TA=25℃;VIN=4.3V;duty cycle=70%

1

10

A

Thermal shutoff temperature

TSD

TA=25℃;VIN=5.3V;IOUT=3.0A

4

165


Table 3b HSK5115-00 function form

Items

Condition

Group

Function representation

Output voltage adjustable function

TA=25℃,Shows in fig4,R3 adjustable between 0~3kΩ

7

The output voltage can be adjustable from 1.5V~12V

Enable function

TA=25℃,VIN=VOUT+1V,IOUT=1A , En=0V

7

Output voltage off

TA=25℃,VIN=VOUT+1V,IOUT=1A , En=VIN

Output voltageon


7  Typical Connection Diagram

HSK5115-00 Electrical test line connection diagram

Fig 9  HSK5115-00 Electrical test line connection diagram

8 Application Notes
☆  The electronic inspecton point should be kept as close as possible at the root of the pin;
☆  It is strictly forbidden to bend the pins;
☆  To prevent the application of two or more absolute maximum ratings on the device at the same time;
☆  To prevent the device from falling off;
☆  To prevent the output and ground short circuit;
☆  To prevent the device from being reversed or dislocated;
☆  During assembly, the bottom of the product should be attached as close as possible to the circuit board to avoid damage to the pin, take shockproof measures for necessary ;
☆  Focus on device power consumption, the power consumption,When the input/output voltage difference(VIN-VOUT) is large, output current IO should be smaller;When the input/output voltage difference(VIN-VOUT)is small ,output current IO should be larger; When the device power consumption is large, be sure to configure the appropriate heat sink to prevent the device damaged due to overheating or into the overheating protection status;
☆  Both positive and negative terminals of power supply shall be correctly connected when power is applied so as to avoid permanent damage to the device.;
☆  Anti-static measures should be taken during storage and transportation.

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